transistor (Total 104632 Patents Found)

Disclosed is an integrated circuit process which includes forming two types of active devices: a first set of IGFETs has silicide gates, and the second set has TiN gates. The same TiN thin film layer also provides local interconnect. Optionally the TiN-gate devices may be used for high-voltage devices and the silicide-...
The circuit derives Vbep, the base-emitter voltage of a saturated PNP transistor, from the PNP portion of a four-layer (PNPN) silicon-controlled rectifier (SCR) so as to exactly match the characteristics of the PNP portion of an SCR against which the reference voltage is to be compared. The operating point of the SCR i...
An electronic semiconductor apparatus having enhanced resistance to detrimental minority carrier substrate injection comprises: a semiconductor substrate of a first conductivity type material having a first predetermined dopant density, the material having conduction and valence energy state band edges which are ...
A collector-loaded grounded-emitter transistor amplifier output stage employs a temperature-compensated bias network with an auxiliary transistor having its base electrode supplied quiescent current exclusively through a resistive element connecting the base and collector electrodes. A source of input signal is coupled...
A method of constructing a single-transistor ferroelectric memory (FEM) cell includes: preparing a silicon substrate for construction of a FEM gate unit; forming gate, source and drain regions on the silicon substrate; forming a nitride layer over the structure to a predetermined thickness equal to a specified thicknes...
A process of fabricating a bipolar junction transistor forms, on the substrate, a masking layer including an opening, an intermediate masking portion surrounded by the opening and an outer masking portion. The masking layer consists of a pad oxide and a silicon nitride. A photoresist is then formed on the outer masking...
A novel heterojunction acoustic charge transport device (HACT) includes a modulation doped field effect transistor (MODFET) on the same substrate. The device is characterized by a sequence of epitaxial layers such that the MODFET is fabricated in a first portion of the uppermost layers while the HACT device is fabricat...
An improved method and an apparatus for forming a self-aligned epitaxial base bipolar transistor in a semiconductor material is disclosed. The method of the invention involves forming an intrinsic base region formed by growing an epitaxial semiconductor material over a collector region. A raised sacrificial emitter cor...
A method of fabricating a lateral transistor is provided, including the steps of: providing a body of semiconductor material including a device region of a first conductivity type; patterning the surface of the device region to define a first transistor region; filling the patterned portion of the device region surroun...
A process for simultaneously fabricating epitaxial resistors, base resistors, and vertical transistor bases in a semiconductor substrate utilizes the stopping power of different layers of materials to determine the location of impurity concentrations induced by ion implantation....
A gate wire is formed on the insulating substrate. The gate wire has gate lines, first and second gate electrodes connected to the gate lines, and gate pads. A gate insulating layer, first and second semiconductor layers and an ohmic contact layer are sequentially formed thereon. A data wire is formed on the ohmic cont...
The bipolar transistor of the present invention includes a Si collector buried layer, a first base region made of a SiGeC layer having a high C content, a second base region made of a SiGeC layer having a low C content or a SiGe layer, and a Si cap layer 14 including an emitter region. The C content is less than 0.8%...
A method for fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulating layer is formed on the substrate to cover the gate. A metal oxide material layer is formed on the gate insulating layer. A photoresist layer is formed on the metal oxide material layer, in which a thickness o...
A thin film transistor substrate of horizontal electric field type includes: a gate line and a first common line formed on a substrate to be in parallel to each other; a data line crossing the gate line and the first common line with a gate insulating film therebetween to define a pixel area; a second common line cross...
A process for fabricating an n channel transistor, which results in electron mobility improvement in the channel, is described. Sacrificial capping layers comprising an oxide and nitride layer are conformally formed over a polysilicon gate after source and drain implantation, and remain in place during annealing....
Provided is a method of fabricating an organic thin film transistor (OTFT) using surface energy control. The method changes a polarity of a gate insulating layer to a polarity of a semiconductor channel layer to be formed on the gate insulating layer by controlling surface energy of the gate insulating layer, thereby p...
A structure and method are provided in which a stress present in a film is reduced in magnitude by oxidizing the film through atomic oxygen supplied to a surface of the film. In an embodiment, a mask is used to selectively block portions of the film so that the stress is relaxed only in areas exposed to the oxidation p...
A transistor ( 10 ) is formed on a semiconductor substrate ( 12 ) with a first surface ( 19 ) for forming a channel ( 40 ). A gate dielectric ( 22 ) has a first thickness overlying a first portion of the channel, and a dielectric film ( 20 ) overlies a second portion of the channel and has a second thickness greater th...
An organic thin film transistor including a substrate, a gate, a gate insulator, an adhesive layer, a metal nano-particle layer and an organic semiconductor layer is provided. The gate is disposed on the substrate. The gate insulator is disposed on the gate and the substrate. The adhesive layer is disposed on the gate ...
Various embodiments of the invention relate to a PMOS device having a transistor channel of silicon germanium material on a substrate, a gate dielectric having a dielectric constant greater than that of silicon dioxide on the channel, a gate electrode conductor material having a work function in a range between a valen...
A heterojunction bipolar transistor comprising a substrate; a collector on the substrate; a base layer on the collector; an emitter layer on the base layer; the emitter layer comprising an upper emitter layer and a lower emitter layer between the upper emitter layer and base; the collector, base and em...
By locally adapting the size and/or density of a contact structure, for instance, within individual transistors or in a more global manner, the overall performance of advanced semiconductor devices may be increased. Hence, the mutual interaction between the contact structure and local device characteristics may be take...
Provided is a bottom gate type thin film transistor including on a substrate ( 1 ) a gate electrode ( 2 ), a first insulating film ( 3 ) as a gate insulating film, an oxide semiconductor layer ( 4 ) as a channel layer, a second insulating film ( 5 ) as a protective layer, a source electrode ( 6 ), and a drain electrode...
A Transistor arrangement in a semiconductor body comprises a power transistor with at least two transistor cells, each transistor cell arranged in a semiconductor fin of the semiconductor body and with a voltage limiting device with at least two device cells. Each device cell is arranged adjacent a transistor cell in t...
The invention discloses a TFT-LCD and its driving method, TFT-LCD comprises an array substrate and a color filter substrate, a common electrode on said color filter substrate being divided into multiple columns, each of which corresponding to one column of pixels; on color filter substrate, odd number columns are first...
A thin-film transistor array panel includes a gate line disposed on a first substrate, the gate line including a gate electrode, a semiconductor layer disposed on the first substrate, the semiconductor layer including an oxide semiconductor, a data wire layer disposed on the first substrate, the data wire layer includi...
A transistor device includes a gate structure positioned above a semiconductor substrate and spaced-apart sidewall spacers positioned above the substrate and adjacent sidewalls of the gate structure, wherein an internal sidewall surface of each of the spaced-apart sidewall spacers has a stepped cross-sectional configur...
Some embodiments include apparatus and methods having a string of memory cells, a conductive line and a bipolar junction transistor configured to selectively couple the string of memory cells to the conductive line. Other embodiments including additional apparatus and methods are described....
A gas sensor for determining gas components in gas mixtures, e.g., for exhaust gases of internal combustion engines, includes a housing and a sensor element configured as a field effect transistor which has source, drain, and gate electrodes applied on a semiconductor substrate. A porous, catalytically active material ...
A method for fabricating a field effect transistor device includes forming a gate stack on a substrate, forming a spacer on the substrate, adjacent to the gate stack, forming a first portion of an active region on the substrate, the first portion of the active region having a first facet surface adjacent to the gate st...